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PA035XSL
Version : 1.1
TECHNICAL SPECIFICATION MODEL NO. : PA035XSL
Customer's Approved Customer Date By PVI's Confirmation Approved By
Prepared By
FOR MORE INFORMATION:
AZ DISPLAYS, INC. 75 COLUMBIA, ALISO VIEJO, CA, 92656 Http://www.AZDISPLAYS.com
This technical specification is subject to change without notice. Please return 1 copy with your signature on this page for approval.
Date : Oct,21 2004
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:1
PA035XSL
TECHNICAL SPECIFICATION CONTENTS
NO.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -
ITEM
Cover Contents Application Features Mechanical Specifications Mechanical Drawing of TFT-LCD module Input / Output Terminals
Pixel Arrangement and input connector pin NO.
PAGE
1 2 3 3 3 4 5 7 8 8 20 20 23 24 24 25 26 28
Absolute Maximum Ratings Electrical Characteristics
Power Sequence
Optical Characteristics Handling Cautions Reliability
Indication of Lot Number Label
Block Diagram Packing Revision History
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PA035XSL
1. Application
This technical specification applies to 3.5" color TFT-LCD panel. The 3.5" color TFT LCD panel is designed for camcorder, digital camera application and other electronic products which require high quality flat panel displays.
2. Features
. Compatible with NTSC or PAL system . High Resolution224,640 Dots . Optimum Viewing Direction 6 o'clock . Up/Down and Left/Right Image Reversion
3. Mechanical Specifications
Parameter Screen Size Surface Treatment Display Format Active Area Dot Pitch Pixel Configuration Outline Dimension Weight Specifications 3.5 (diagonal) Anti-Glare 960x234 71.6x52.65 0.0745 (H)x0.225 (V) Delta 83.5(W)x63.1(H)x3.6 (D) 325 Unit inch dot mm mm mm g
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PA035XSL
4. Mechanical Drawing of panel:
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:4
PA035XSL
5.Input / Output Terminals Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GLED2 GLED3 VLED I I I Symbol STH1 AVSS AVDD VB VG VR VSS VDD CPH1 CPH2 CPH3 STH2 Q2H INH R/L VCOM XOE CPV U/D DIO2 DIO1 VGL VEE VSS VCC VGH I/O I/O I I I I I I I I I I I/O I I I I I I I I/O I/O I I I I I Description Start pulse for source driver Analog GND for source driver Analog power input for source driver Video Input B Video Input G Video Input R Digital GND Digital power input Sampling and shift clock for source driver Sampling and shift clock for source driver Sampling and shift clock for source driver Start pulse for source driver Video input rotation control Output enable for source driver Left/Right Control for source driver Common electrode voltage Output enable for gate driver Clock input for gate driver Up/Down Control for gate driver Vertical start pulse Vertical start pulse Gate off voltage(alternative every 1-H) Gate driver negative voltage GND Logic power for gate driver Gate on voltage NC Supply current for LED B/L Supply current for LED B/L Supply voltage for LED B/L Note 5-3 Note 5-7 Note 5-5 Note 5-4 Note 5-6 Note 5-1 Note 5-4 Note 5-1 Note 5-3 Note 5-4 Note 5-2 Remark Note 5-1
Note 5-1STH1, STH2 and R/L mode R/L High(VDD) Low(0 Volt.) STH1 Input Output STH2 Output Input Remark Left to Right Right to Left
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PA035XSL
Note 5-2AVDD = +5V (Typ.) Note 5-3VDD, VCC = +3.3V (Typ.) Note 5-4VCOM = 6VPP. Phase of the video signal input and VCOM The relation between these values could refer to 8-1 Operating condition.
100% white Composite Video Signal pedestal
R,G,B Video Signal Vi DC (VR ,VG ,VB)
Vi AC
VCOM VCOM DC
VCOM AC
VGL VGL DC
VGL AC
1H 1H
Fig.1 Liquid crystal transmission of the video signal input, VCOM and timing VCOM H Level Video Signal Input Maximum Video Signal Input Minimum Black White L Level White Black
White : maximum transmission / Black : minimum transmission
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PA035XSL
Note 5-5DIO1, DIO2 and U/D mode U/D High (VDD) Low (0 Volt.) Note 5-6VEE = -15V (Typ.). Note 5-7VGH = +17V (Typ.). DIO1 Input Output DIO2 Output Input Remark Down to Up Up to Down
6. Pixel Arrangement and input connector pin NO.
1 1 2 3 4 R R B G B G
2 R B R B
3 G R G R
4 B G B G
5 R B R B
6 G R G R
958 B G B G
959 R B R B
960 G
G
233 234 R
B G
R B
G R
B G
R B
G R
B G
R B
G
1
30
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PA035XSL
7. Absolute Maximum Ratings: The followings are maximum values , which if exceeded, may cause faulty operation or damage to the unit. GND = 0 V Ta = 25 Parameter Symbol MIN. MAX. Unit Remark Supply Voltage Analog AVDD -0.3 +7.0 for Source Driver Digital VDD -0.3 +7.0 Positive VGH -0.3 +45 V Supply Voltage Negative VGL -23 +0.3 V for Gate Driver VGH-VGL +15 +40 V VVideo -0.3 +7.3 V Notes:7-1 Analog input voltage Storage Temperature -20 +70 Operation Temperature 0 +60 Notes:7-2 Notes 7-1 : Analog Input Voltage means VR,VG,VB. Notes 7-2 : Operating Temperature define that contrast, response time, other display optical character are Ta=+25.
8. Electrical Characteristics
8-1) Operating Condition Item Symbol VCC VDD AVDD Power Supply VGH VEE VGL AC VGL DC Video Signal (VR, VG, VB) Vi AC Vi DC VCOM AC VCOM DC H Level +0.7 VDD L Level Min. +3.0 +4.5 +15.0 -15.5 -12.5 0.76 Typ. +3.3 +5.0 +17.0 -15.0 +6.0 -11.0 +4.0 +2.5 +6.0 0.96 Max. +3.6 +5.5 +19.0 -14.5 -9.5 +4.2 11.6 Unit V V V V VP-P V VP-P V VP-P V V V AC Component of VGL DC Component of VGL AC Component Note 8-2 DC Component AC Component of VCOM DC Component of VCOM Note 8-1 Remark
VCOM
+0.3 VDD +0.3 VDD
Note 8-1STH1,STH2,CPH1,CPH2,CPH3,Q2H,INH,CPV,XOE,DIO1,DIO2
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PA035XSL
Note 8-2Both NTSC and PAL system Video Signal input waveform is based on 8 steps gray scale.
White Black White Black
4.00.2V
White
White
Black
8-2)Current Consumption (GND=AVSS=0V) Symbol Condition IGH VGH=+17V IGL VGL=-12V Current for Driver ICC VCC=+3.3V AIDD AVDD=+5V IDD VDD=+3.3V IEE VEE=-15V 8-3) Backlight driving & Power Consumption Parameter Min. Typ. 0.055 0.067 0.441 7 1.2 0.441 Max. 0.083 0.087 0.563 10 3 0.600 Unit mA mA mA mA mA mA
Ta= 25 Remark VGL center voltage
Pin No Symbol Description 28 GLED2 Supply current for LED 29 GLED3 Supply current for LED 30 VLED Supply voltage for LED Note 8-3 : Supply voltage for LED would depend on supply current. Parameter LED voltage LED current Symbol VLED Min. Typ.
Remark
Note 8-3 GND = 0 V Ta= 25 Max. Unit Remark IL=20mA V 11.4 Note 8-4 Note 8-5
9
9.6
ILED1 20 mA ILED2 Backlight Power Consumption PLED 360 384 456 mW Note 8-4 : LED B/L applied information , please refer to the appendix at the end . Note 8-5 : PLED = VLED* ILED1 + VLED* ILED2
ILED1 Pin29 GLED
(+9.6V) Pin 30 VLED
Pin28 GLED ILED2
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PA035XSL
8-4) Power Consumption Parameter LCD Panel Power Consumption Backlight Power Consumption Total Power Consumption Symbol Conditions PLED Ta= 25 TYP. MAX Unit Remark 48.7 72.4 mW 384 456 mW 432.7 528.4 mW
8-5) Timing Characteristics Of Input Signals Characteristics 1Field Scanning Period 1Line Scanning Period Source Driver Operating Frequency Signal Sampling Pulse Width Signal Sampling Pulse Delay Signal Sampling Pulse Width(H) Signal Sampling Pulse Delay(L) Source Start Signal Pulse Width Source Start Signal Setup Time Source Start Signal Hold Time Source Output Enable Pulse Width Source Start Signal Rising Time Video Input Signal Start Point Phase Difference Between OEH&CPV Gate Clock Period Gate Clock Pulse Width(H) Gate Clock Pulse Width(L) Gate Start Signal Pulse Width Gate Start Signal Setup Time Gate Start Signal Hold Time Phase Difference Between OEH&STH Phase Difference Between SYNC&OEH Gate Output Enable Pulse Width VCOM Delay Time RGB Delay Time Vertical Display Start Symbol t1V t1H fhc tchw tchd tchwh tchwl tshw tshset tshhld tohw tss tvs toc tcvw tcvwh tcvwl tsvw tsvset tsvhld tosp tohs toev tDCOM tDRGB tsv Min. 4 125 47.65 71.45 71.45 45 20 20 1.0 1.5 10 10 10 5 5 5 Typ. 262.5 63.5 6.4 156.25 52 78.12 78.12 156.25 78.12 78.12 9.8 10.0 2.3 63.5 31.7 31.7 63.5 53.2 10.3 4 1.4 2.5 3 Max. 8 250 58.25 87.35 87.35 315 48 48 126** 3 2 Unit Remark H s MHz ns ns tchd 12,23 ns ns ns *tshset=tshhld ns ns s s s s s s s s **tsvset=tsvhld s s s s s s s tH
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PA035XSL
8-6) Signal Timing Waveforms
(285H~519H)
2nd display period
265 266 267 268 269
282 283 284 285 286
1st display period
t1V=262.5H
Xout
2
3
4
5
6
7
19
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DIO
HD
VD
tsvw
20
Fig. 8-1 Vertical Start Line for NTSC
(22H~256H)
21
22
23
HD
VD
(28H~299H)
1st display period
2nd display period
(339H~611H)
Xout
3 312 313 314 315 316 4 25 26 27 28 29
624 625
1
2
336 337 338 339 340
t1V=312.5H
DIO
tsvw
* * o d d fi e l d : S c a n li n e s 1 4 n + 6 1 4 n + 1 2 ( n = 2 , 3 , 4 ..) a r e n o t d i s p l a y e d . e v e n fi e l d : S c a n li n e s 1 4 n + 1 2 1 4 n + 2 0 ( n = 2 , 3 , 4 ..) a r e n o t d i s p l a y e d .
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PA035XSL
Fig. 8-1 Vertical Start Line for PAL
PA035XSL
1
2
320
321
Invalidity data
Tshw
406
1
STH1,2
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R,G,B
CPH1
404
Invalidity data
405
Fig. 8-2 Horizontal Start Pixel
t1H=406 CPHclk=63.5u sec
2
Validity data
3
PA035XSL
tshw
tss
tosp
tcvwh
tDCOM
tohw
toc
STH1,2
tohs
toev
VCOM
XOE
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VR,G,B
CPV
Q2H
INH
HD
tDRGB
tvs
Fig. 8-3 Detail Horizontal Timing
tcvw
tcvwl
PA035XSL
R3 (B3)
R2 (B2)
G2 (R2) B1 (G1) tchd12 tchd23 tshset CPH 1 CPH 2
B2 (G2)
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CPH 3
STH 1,2
tshw
Fig. 8-4 Sampling Clock Timing
tchw
tchwl
tchwh
tshhld
R1 (B1)
G1 (R1)
PA035XSL
tcvw
tcvwh
tcvwl
tsvset
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DIO 1,2
CPV
Fig. 8-5 Vertical Shift Clock Timing
tsvhld
tsvw
PA035XSL
Vertical timing (From up to down)
tsv
BRG
RGB
V(R,G,B) ODD FIELD
V(R,G,B) EVEN FIELD
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VCOM (Even field)
VCOM (Odd field)
DIO1
Q2H
HD
VD
Fig. 8-6(b) Vertical Timing (From Up to Down)
Display on panel first line
PA035XSL
Vertical timing (From down to up)
BRG
RGB
V(R,G,B) EVEN FIELD
V(R,G,B) ODD FIELD
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VCOM (Even field)
VCOM (Odd field)
DIO2
HD
Q2H
VD
Fig. 8-6(a) Vertical Timing (From Down to Up)
Display on panel first line
tsv
PA035XSL
9. Power on Sequence(Voltage source) The Power on Sequence only effect by VCC,VSS,VDD,VEE and VGH, the others do not care.
VGH
VDD,VCC
VSS(0V)
VEE
OFF T1
ON T3 Logic signal VCOM,VGL RGB-Video signal
OFF
T2
T4
1) 10msT110. Optical Characteristics 10-1) Specification
Parameter Viewing Angle Symbol Horizontal (to 12 o'clock) Vertical (to 6 o'clock) CR Rise Fall Tr Tf U X y 20mA Condition MIN. 45 10 30 At optimized Viewing angle =0 =0 200 TYP. MAX. 50 15 35 350 15 25 75 250 30 50 ms ms Ta = 25 Unit Remarks deg deg deg Note 10-1 Note 10-4 Note 10-3
CR10
Contrast Ratio Response time Uniformity Brightness White Chromaticity LED Life Time
70 200 =0 0.280 0.300
cd/ Note 10-2 Note 10-2 hr Note 10-2
0.310 0.340 0.330 0.360 10000
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PA035XSL
Luminance when LCD is White Note 10-1CR Luminance when LCD is Black Contrast Ratio is measured in optimum common electrode voltage. The test configurations of contrast ratio see section 10-2. Note 10-21.Topcon BM-7(fast) luminance meter 1.0field of view is used in the testing (after 5 minutes operation). 2. LED current : 20 mA . 3.Conditions:The brightness of center point becomes 50% of initial brightness. Note 10-3The definition of viewing angle diagrams :
normal ( = 0) observer
3
AB C
12
6
LCD panel 9
: Viewing direction
: Viewing angle
Note 10-4 : The definitions of response time:
White 100% 90% Brightness 10% 0% Tr Tf
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Black
White
PA035XSL
10-2) Test Configuration
BM-7(fast) Caution: 1. Environmental illumination1 lux 2. Before test CR, Vcom voltage must be adjusted carefully to get the best 500mm CR.
R,G,B signal
input
Pattern generator
LCD Backlight
LCD Display
Testing Point
Testing Point
Pattern A R, G, B Waveform of Pattern A at Testing Point
63.6s 63.6s
Pattern B
RGB waveform Vcom
Vw=1.1V +/- 0.2V
R, G, B Waveform of Pattern B at Testing Point
63.6s 63.6s
RGB waveform
Vcom
Vb=5.2V +/- 0.2V
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PA035XSL
11. Handling Cautions 11-1) Mounting of module a) Please power off the module when you connect the input/output connector. 0. Please connect the ground pattern of the backlight power circuit and case surely. If the connection is not perfect, some following problems may happen possibly. The noise from the backlight unit will increase. 1. 1. The output from power circuit will be unstable. 2. In some cases a part of module will heat. 3. Polarizer which is made of soft material and susceptible to flaw must be handled carefully. b) Protective film (Laminator) is applied on surface to protect it against scratches and dirt. It is recommended to peel off the laminator before use and taking care of static electricity. 11-2) Precautions in mounting a) When metal part of the TFT-LCD module (shielding lid and rear case) is soiled, wipe it with soft dry cloth. b) Wipe off water drops or finger grease immediately. Long contact with water may cause discoloration or spots. c) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface. Please handle with care. d) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when handling. 11-3) Adjusting module a) Adjusting volumes on the rear face of the module have been set optimally before shipment. b) Therefore, do not change any adjusted values. If adjusted values are changed, the specifications described may not be satisfied. 11-4) Others a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many Hours. b) Store the module at a room temperature place. c) The voltage of beginning electric discharge may over the normal voltage because of leakage current from approach conductor by to draw lump read lead line around. d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel. Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet. Wash it out immediately with soap. e) Observe all other precautionary requirements in handling general electronic components. f) Please adjust the voltage of common electrode as material of attachment by 1 module.
12. Reliability
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PA035XSL
No. 1 2 3 4 5 Test Item High Temperature Storage Test Low Temperature Storage Test Low Temperature Operation Test High Temperature & High Humidity Operation Test Thermal Cycling Test (non-operating) Vibration Test (non-operating) Shock Test (non-operating) Electrostatic Discharge Test (non-operating) Ta: ambient temperature [Criteria] Under the display quality test conditions with normal operation state, there should be no change which may affect practical display function. 13. Indication of Lot Number Label 1. Indicated contents of the label Test Condition Ta = +70 , 240 hrs Ta = -20, 240 hrs Ta = 0 , 240 hrs Ta = +60, 90%RH, 240 hrs -20 +70, 200 Cycles 30 min 30 min Frequency10 ~ 55 HZ Amplitude1.0 mm Sweep time: 11 mins Test Period: 6 Cycles for each direction of X, Y, Z 100G, 6ms Direction: X, Y, Z Cycle: 3 times Machine Mode=200V C=200pF,R=0 1 times discharge for each pad
6
7
8
Lot number
OOO-OOOOOO
PA035XSLXX
Module number
Contents of lot number : 1st~3rd--The OEM product 5th--Production year : 19999, 2000A, 2001B........ 6th--Production month : 1, 2, 3,....9, A, B, C 7th~8th--Production size : 3.5" 35 9th~10th-- Serial numbers : 01~99
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PA035XSL
14. Block Diagram 14.1 LCD Module Diagram
LCD Panel
V Driver (Gate)
H Driver (Source)
Back-light
30 PIN Input
14.2 Backlight Driving Diagram
VLED (PIN 30) 40mA(6LED) , 60mA(9LED) +150.5V
+150.5V
+150.5V
0.1F
47F 25V
GLED (PIN 29) 20mA
GLED (PIN 28) 20mA 22K 5%
GLED (PIN 27) 20mA
22K 5%
22K 5%
1K VR
2SC2412
2SC2412 1K VR 1K VR
2SC2412
A 0.1F
20mA , 1V
A 0.1F
20mA , 1V
A 0.1F
20mA , 1V
2K 5%
50 1% 1/16 W
2K 5%
50 1% 1/16 W
2K 5%
50 1% 1/16 W
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PA035XSL
15. Packing
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:25
PA035XSL
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:26
PA035XSL Revision History
Rev. 0.1 0.2 1.0 1.1 Issued Date Mar,30 2004 Jul,5 2004 Aug,13 2004 Oct,21 2004 Revised Contents NEW Modify Page 3: Outline Dimension From 83.7(W)x68.6(H)x6.6 (D) to 83.5(W)x63.1(H)x3.6 (D) Updata Page 21:E/S Optics data10-1) Specification Page27,28: Packing drawing Modify Page 10: 8-5) Timing Characteristics Of Input Signals Page 13: Fig.8-2 Horizontal Start Pixel
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